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| author | Atish Patra <[email protected]> | 2025-04-30 08:16:28 +0000 |
|---|---|---|
| committer | Anup Patel <[email protected]> | 2025-05-21 04:04:35 +0000 |
| commit | e23bb06b17f81982450beb880b9c5a7fb4251164 (patch) | |
| tree | b83d844322770f980feb0d16f097b3f22357fd4b /rust/helpers/workqueue.c | |
| parent | KVM: RISC-V: reset smstateen CSRs (diff) | |
| download | kernel-e23bb06b17f81982450beb880b9c5a7fb4251164.tar.gz kernel-e23bb06b17f81982450beb880b9c5a7fb4251164.zip | |
KVM: riscv: selftests: Align the trap information wiht pt_regs
The current exeception register structure in selftests are missing
few registers (e.g stval). Instead of adding it manually, change
the ex_regs to align with pt_regs to make it future proof.
Suggested-by: Andrew Jones <[email protected]>
Reviewed-by: Andrew Jones <[email protected]>
Signed-off-by: Atish Patra <[email protected]>
Link: https://lore.kernel.org/r/[email protected]
Signed-off-by: Anup Patel <[email protected]>
Diffstat (limited to 'rust/helpers/workqueue.c')
0 files changed, 0 insertions, 0 deletions