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| author | Marc Zyngier <[email protected]> | 2025-04-09 10:53:15 +0000 |
|---|---|---|
| committer | Marc Zyngier <[email protected]> | 2025-04-11 12:08:23 +0000 |
| commit | b7628c7973765c856866b3047c9002ae0825add6 (patch) | |
| tree | 8da02e190846d06fd47f90cb1d1d068b8af2c41e /rust/helpers/task.c | |
| parent | KVM: arm64: Contextualise the handling of PMCR_EL0.P writes (diff) | |
| download | kernel-b7628c7973765c856866b3047c9002ae0825add6.tar.gz kernel-b7628c7973765c856866b3047c9002ae0825add6.zip | |
KVM: arm64: Allow userspace to limit the number of PMU counters for EL2 VMs
As long as we had purely EL1 VMs, we could easily update the number
of guest-visible counters by letting userspace write to PMCR_EL0.N.
With VMs started at EL2, PMCR_EL1.N only reflects MDCR_EL2.HPMN,
and we don't have a good way to limit it.
For this purpose, introduce a new PMUv3 attribute that allows
limiting the maximum number of counters. This requires the explicit
selection of a PMU.
Suggested-by: Oliver Upton <[email protected]>
Reviewed-by: Oliver Upton <[email protected]>
Signed-off-by: Marc Zyngier <[email protected]>
Diffstat (limited to 'rust/helpers/task.c')
0 files changed, 0 insertions, 0 deletions