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| author | Arnd Bergmann <[email protected]> | 2025-07-22 21:02:23 +0000 |
|---|---|---|
| committer | Arnd Bergmann <[email protected]> | 2025-07-22 21:02:24 +0000 |
| commit | dc56e105c5402afa409b1f9b18b1284f4e01971f (patch) | |
| tree | 178c5218e00814b8fb5fd14a017951d206253384 /rust/helpers/pid_namespace.c | |
| parent | Merge tag 'thead-dt-for-v6.17' of https://git.kernel.org/pub/scm/linux/kernel... (diff) | |
| parent | ARM: dts: microchip: sama7g5: Add cache configuration for cpu node (diff) | |
| download | kernel-dc56e105c5402afa409b1f9b18b1284f4e01971f.tar.gz kernel-dc56e105c5402afa409b1f9b18b1284f4e01971f.zip | |
Merge tag 'at91-dt-6.17' of https://git.kernel.org/pub/scm/linux/kernel/git/at91/linux into soc/dt
Microchip AT91 device tree updates for v6.17
This update includes:
- controllers enabled for SAMA7D65 SoC (crypto controllers, PWM, CAN)
- controllers enabled for SAM9X7 SoC (LCD, LVDS)
- cache configuration updates for SAMA5D2, SAMA5D3, SAMA5D4, SAMA7G5,
SAMA7D65
- cleanups
* tag 'at91-dt-6.17' of https://git.kernel.org/pub/scm/linux/kernel/git/at91/linux: (22 commits)
ARM: dts: microchip: sama7g5: Add cache configuration for cpu node
ARM: dts: microchip: sama7d65: Add cache configuration for cpu node
ARM: dts: microchip: sama5d4: Update the cache configuration for CPU
ARM: dts: microchip: sama5d3: Update the cache configuration for CPU
ARM: dts: microchip: sama5d2: Update the cache configuration for CPU
ARM: dts: microchip: sam9x7: Add LVDS controller
ARM: dts: microchip: sama5d2_icp: rename spi-cs-setup-ns property to spi-cs-setup-delay-ns
ARM: dts: microchip: sama5d27_wlsom1: rename spi-cs-setup-ns property to spi-cs-setup-delay-ns
ARM: dts: microchip: sama5d27_som1: rename spi-cs-setup-ns property to spi-cs-setup-delay-ns
ARM: dts: microchip: sam9x60ek: rename spi-cs-setup-ns property to spi-cs-setup-delay-ns
ARM: dts: at91-sama5d27_wlsom1: Improve the Wifi compatible
ARM: dts: microchip: gardena-smart-gateway: Fix power LED
ARM: dts: microchip: sam9x7: Add clock name property
ARM: dts: microchip: sama7d65: Add clock name property
ARM: dts: microchip: sama7g5: Adjust clock xtal phandle
ARM: dts: microchip: sam9x7: Add HLCD controller
ARM: dts: microchip: sama7d65: Enable CAN bus
ARM: dts: microchip: sama7d65: Clean up extra space
ARM: dts: microchip: sama7d65: Add CAN bus support
ARM: dts: microchip: sama7d65: Add PWM support
...
Link: https://lore.kernel.org/r/[email protected]
Signed-off-by: Arnd Bergmann <[email protected]>
Diffstat (limited to 'rust/helpers/pid_namespace.c')
0 files changed, 0 insertions, 0 deletions