diff options
| author | Sunil V L <[email protected]> | 2024-10-14 06:57:39 +0000 |
|---|---|---|
| committer | Thomas Gleixner <[email protected]> | 2024-10-15 21:14:25 +0000 |
| commit | a98a0f050ced4bd4ecb59e92412916012b7c2917 (patch) | |
| tree | 22e46f831960eb94943e94c186fa307403802e12 /rust/helpers/helpers.c | |
| parent | irqchip/sifive-plic: Unmask interrupt in plic_irq_enable() (diff) | |
| download | kernel-a98a0f050ced4bd4ecb59e92412916012b7c2917.tar.gz kernel-a98a0f050ced4bd4ecb59e92412916012b7c2917.zip | |
irqchip/riscv-intc: Fix SMP=n boot with ACPI
When CONFIG_SMP is disabled, the static array rintc_acpi_data with size
NR_CPUS is not sufficient to hold all RINTC structures passed from the
firmware.
All RINTC structures are required to configure IMSIC/APLIC/PLIC properly
irrespective of SMP in the OS. So, allocate dynamic memory based on the
number of RINTC structures in MADT to fix this issue.
Fixes: f8619b66bdb1 ("irqchip/riscv-intc: Add ACPI support for AIA")
Reported-by: Björn Töpel <[email protected]>
Signed-off-by: Sunil V L <[email protected]>
Signed-off-by: Thomas Gleixner <[email protected]>
Tested-by: Alexandre Ghiti <[email protected]>
Reviewed-by: Anup Patel <[email protected]>
Link: https://lore.kernel.org/all/[email protected]
Closes: https://github.com/linux-riscv/linux-riscv/actions/runs/11280997511/job/31375229012
Diffstat (limited to 'rust/helpers/helpers.c')
0 files changed, 0 insertions, 0 deletions