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| author | Kan Liang <[email protected]> | 2024-07-08 18:55:24 +0000 |
|---|---|---|
| committer | Peter Zijlstra <[email protected]> | 2024-07-09 11:26:38 +0000 |
| commit | a5a6ff3d639d088d4af7e2935e1ee0d8b4e817d4 (patch) | |
| tree | 5482da2ba10c77eba2a5be13cdb23fa48b02b609 /rust/helpers.c | |
| parent | perf: Split __perf_pending_irq() out of perf_pending_irq() (diff) | |
| download | kernel-a5a6ff3d639d088d4af7e2935e1ee0d8b4e817d4.tar.gz kernel-a5a6ff3d639d088d4af7e2935e1ee0d8b4e817d4.zip | |
perf/x86/intel/uncore: Fix the bits of the CHA extended umask for SPR
The perf stat errors out with UNC_CHA_TOR_INSERTS.IA_HIT_CXL_ACC_LOCAL
event.
$perf stat -e uncore_cha_55/event=0x35,umask=0x10c0008101/ -a -- ls
event syntax error: '..0x35,umask=0x10c0008101/'
\___ Bad event or PMU
The definition of the CHA umask is config:8-15,32-55, which is 32bit.
However, the umask of the event is bigger than 32bit.
This is an error in the original uncore spec.
Add a new umask_ext5 for the new CHA umask range.
Fixes: 949b11381f81 ("perf/x86/intel/uncore: Add Sapphire Rapids server CHA support")
Closes: https://lore.kernel.org/linux-perf-users/alpine.LRH.2.20.2401300733310.11354@Diego/
Signed-off-by: Kan Liang <[email protected]>
Signed-off-by: Peter Zijlstra (Intel) <[email protected]>
Reviewed-by: Ian Rogers <[email protected]>
Cc: [email protected]
Link: https://lkml.kernel.org/r/[email protected]
Diffstat (limited to 'rust/helpers.c')
0 files changed, 0 insertions, 0 deletions