diff options
| author | Xi Ruoyao <[email protected]> | 2024-12-23 09:20:41 +0000 |
|---|---|---|
| committer | Thomas Bogendoerfer <[email protected]> | 2025-01-11 11:34:39 +0000 |
| commit | 078b831638e1aa06dd7ffa9f244c8ac6b2995561 (patch) | |
| tree | 3be89b3470c1e781e7e72dce56704d19c288aa7e /rust/compiler_builtins.rs | |
| parent | MIPS: Fix the wrong format specifier (diff) | |
| download | kernel-078b831638e1aa06dd7ffa9f244c8ac6b2995561.tar.gz kernel-078b831638e1aa06dd7ffa9f244c8ac6b2995561.zip | |
Revert "MIPS: csrc-r4k: Select HAVE_UNSTABLE_SCHED_CLOCK if SMP && 64BIT"
This reverts commit 426fa8e4fe7bb914b5977cbce453a9926bf5b2e6.
The commit has caused two issues on Loongson 3A4000:
1. The timestamp in dmesg become erratic, like:
[3.736957] amdgpu 0000:04:00.0: ... ...
[3.748895] [drm] Initialized amdgpu ... ...
[18446744073.381141] amdgpu 0000:04:00:0: ... ...
[1.613326] igb 0000:03:00.0 enp3s0: ... ...
2. More seriously, some workloads (for example, the test
stdlib/test-cxa_atexit2 in the Glibc test suite) triggers an RCU
stall and hang the system with a high probably (4 hangs out of 5
tests).
Revert this commit to use jiffie on Loongson MIPS systems and fix these
issues for now. The root cause may need more investigation.
Cc: [email protected] # 6.11+
Cc: Jiaxun Yang <[email protected]>
Cc: Icenowy Zheng <[email protected]>
Signed-off-by: Xi Ruoyao <[email protected]>
Reviewed-by: Jiaxun Yang <[email protected]>
Signed-off-by: Thomas Bogendoerfer <[email protected]>
Diffstat (limited to 'rust/compiler_builtins.rs')
0 files changed, 0 insertions, 0 deletions
