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| author | Shubhrajyoti Datta <[email protected]> | 2025-01-06 08:29:37 +0000 |
|---|---|---|
| committer | Stephen Boyd <[email protected]> | 2025-01-07 19:50:07 +0000 |
| commit | 7681f64e6404edbca2f67501c98d596e5c307993 (patch) | |
| tree | cb0201058f9a7dca89034564540c96239913233c /net/unix/sysctl_net_unix.c | |
| parent | dt-bindings: clock: xilinx: Add reset GPIO for VCU (diff) | |
| download | kernel-7681f64e6404edbca2f67501c98d596e5c307993.tar.gz kernel-7681f64e6404edbca2f67501c98d596e5c307993.zip | |
clk: clocking-wizard: calculate dividers fractional parts
Calculate dividers fractional parts to optimally modulate output frequency.
Clocking wizard supports having multiplier m and divisors d and o.
Currently the fractional parts of m and o are not utilised.
For the pixel clock usecases a higher accuracy is needed..
Adding support for m and o to have fractional values.
Co-developed-by: Anatoliy Klymenko <[email protected]>
Signed-off-by: Anatoliy Klymenko <[email protected]>
Signed-off-by: Shubhrajyoti Datta <[email protected]>
Tested-by: Anatoliy Klymenko <[email protected]>
Link: https://lore.kernel.org/r/[email protected]
Signed-off-by: Stephen Boyd <[email protected]>
Diffstat (limited to 'net/unix/sysctl_net_unix.c')
0 files changed, 0 insertions, 0 deletions