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authorPeng Ma <[email protected]>2024-02-01 21:50:07 +0000
committerVinod Koul <[email protected]>2024-02-07 08:31:49 +0000
commit9d739bccf261dd93ec1babf82f5c5d71dd4caa3e (patch)
tree3963d88085c95e8e11422d8b417594f600afc868 /net/unix/af_unix.c
parentdmaengine: dw-edma: eDMA: Add sync read before starting the DMA transfer in r... (diff)
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dmaengine: fsl-qdma: fix SoC may hang on 16 byte unaligned read
There is chip (ls1028a) errata: The SoC may hang on 16 byte unaligned read transactions by QDMA. Unaligned read transactions initiated by QDMA may stall in the NOC (Network On-Chip), causing a deadlock condition. Stalled transactions will trigger completion timeouts in PCIe controller. Workaround: Enable prefetch by setting the source descriptor prefetchable bit ( SD[PF] = 1 ). Implement this workaround. Cc: [email protected] Fixes: b092529e0aa0 ("dmaengine: fsl-qdma: Add qDMA controller driver for Layerscape SoCs") Signed-off-by: Peng Ma <[email protected]> Signed-off-by: Frank Li <[email protected]> Link: https://lore.kernel.org/r/[email protected] Signed-off-by: Vinod Koul <[email protected]>
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