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| author | Linus Torvalds <[email protected]> | 2025-11-16 15:05:24 +0000 |
|---|---|---|
| committer | Linus Torvalds <[email protected]> | 2025-11-16 15:05:24 +0000 |
| commit | 87751e715e23ede7386fb57a1a8593aa9830b21f (patch) | |
| tree | 0959b01a85bf2837b640edf140601f13fd0000d2 /net/unix/af_unix.c | |
| parent | Merge tag 's390-6.18-4' of git://git.kernel.org/pub/scm/linux/kernel/git/s390... (diff) | |
| parent | EDAC/altera: Use INTTEST register for Ethernet and USB SBE injection (diff) | |
| download | kernel-87751e715e23ede7386fb57a1a8593aa9830b21f.tar.gz kernel-87751e715e23ede7386fb57a1a8593aa9830b21f.zip | |
Merge tag 'edac_urgent_for_v6.18_rc6' of git://git.kernel.org/pub/scm/linux/kernel/git/ras/ras
Pull EDAC fixes from Borislav Petkov:
- In Versalnet, handle the reporting of non-standard hw errors whose
information can come in more than one remote processor message.
- Explicitly reenable ECC checking after a warm reset in Altera OCRAM
as those registers are reset to default otherwise
- Fix single-bit error injection in Altera EDAC to not inject errors
directly in ECC RAM and thus lead to false double-bit errors due to
same ECC RAM being in concurrent use
* tag 'edac_urgent_for_v6.18_rc6' of git://git.kernel.org/pub/scm/linux/kernel/git/ras/ras:
EDAC/altera: Use INTTEST register for Ethernet and USB SBE injection
EDAC/altera: Handle OCRAM ECC enable after warm reset
EDAC/versalnet: Handle split messages for non-standard errors
Diffstat (limited to 'net/unix/af_unix.c')
0 files changed, 0 insertions, 0 deletions