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| author | Paul Burton <[email protected]> | 2016-08-19 17:18:28 +0000 |
|---|---|---|
| committer | Ralf Baechle <[email protected]> | 2016-09-29 16:59:49 +0000 |
| commit | 67acd8d5c606cf42e6726767d705851dec9f6a34 (patch) | |
| tree | f47a7004f00792f0c9c05590dda085bdfa2e1a72 /net/unix/af_unix.c | |
| parent | MIPS: Configure FTLB after probing TLB sizes from config4 (diff) | |
| download | kernel-67acd8d5c606cf42e6726767d705851dec9f6a34.tar.gz kernel-67acd8d5c606cf42e6726767d705851dec9f6a34.zip | |
MIPS: clear execution hazard after changing FTLB enable
On current P-series cores from Imagination the FTLB can be enabled or
disabled via a bit in the Config6 register, and an execution hazard is
created by changing the value of bit. The ftlb_disable function already
cleared that hazard but that does no good for other callers. Clear the
hazard in the set_ftlb_enable function that creates it, and only for the
cores where it applies.
This has the effect of reverting c982c6d6c48b ("MIPS: cpu-probe: Remove
cp0 hazard barrier when enabling the FTLB") which was incorrect.
Signed-off-by: Paul Burton <[email protected]>
Fixes: c982c6d6c48b ("MIPS: cpu-probe: Remove cp0 hazard barrier when enabling the FTLB")
Cc: [email protected]
Patchwork: https://patchwork.linux-mips.org/patch/14023/
Signed-off-by: Ralf Baechle <[email protected]>
Diffstat (limited to 'net/unix/af_unix.c')
0 files changed, 0 insertions, 0 deletions