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| author | Josua Mayer <[email protected]> | 2022-05-17 08:54:29 +0000 |
|---|---|---|
| committer | Jakub Kicinski <[email protected]> | 2022-05-19 02:58:20 +0000 |
| commit | 1f77204e11f8b9e5d77d65197a03b702c50ea29b (patch) | |
| tree | c262afb6d290d0059575abe32ee2d9f784233071 /net/tls/tls_main.c | |
| parent | net: smc911x: Fix min() use in debug code (diff) | |
| download | kernel-1f77204e11f8b9e5d77d65197a03b702c50ea29b.tar.gz kernel-1f77204e11f8b9e5d77d65197a03b702c50ea29b.zip | |
dt-bindings: net: adin: document phy clock output properties
The ADIN1300 supports generating certain clocks on its GP_CLK pin, as
well as providing the reference clock on CLK25_REF.
Add DT properties to configure both pins.
Technically the phy also supports a recovered 125MHz clock for
synchronous ethernet. However SyncE should be configured dynamically at
runtime, so it is explicitly omitted in this binding.
Signed-off-by: Josua Mayer <[email protected]>
Reviewed-by: Krzysztof Kozlowski <[email protected]>
Signed-off-by: Jakub Kicinski <[email protected]>
Diffstat (limited to 'net/tls/tls_main.c')
0 files changed, 0 insertions, 0 deletions