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| author | Nickey Yang <[email protected]> | 2017-09-26 07:55:22 +0000 |
|---|---|---|
| committer | Heiko Stuebner <[email protected]> | 2017-09-26 13:59:17 +0000 |
| commit | 0bc15d85d97d44e8979ff91d0c1fbafe6fd4172c (patch) | |
| tree | 22f0eb6808d26ab5562aca9b05df1bc2c97f10e4 /net/switchdev | |
| parent | arm64: dts: rockchip: Correct MIPI DPHY PLL clock on rk3399 (diff) | |
| download | kernel-0bc15d85d97d44e8979ff91d0c1fbafe6fd4172c.tar.gz kernel-0bc15d85d97d44e8979ff91d0c1fbafe6fd4172c.zip | |
arm64: dts: rockchip: add the grf clk for dw-mipi-dsi on rk3399
The clk of grf must be enabled before writing grf
register for rk3399.
Signed-off-by: Nickey Yang <[email protected]>
[the grf clock is already part of the binding since march 2017]
Signed-off-by: Heiko Stuebner <[email protected]>
Diffstat (limited to 'net/switchdev')
0 files changed, 0 insertions, 0 deletions