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| author | Bard Liao <[email protected]> | 2015-04-28 03:27:39 +0000 |
|---|---|---|
| committer | Mark Brown <[email protected]> | 2015-04-29 11:19:45 +0000 |
| commit | 60a8d62b8497c23eb3d48149af7e55dac2dd83a2 (patch) | |
| tree | 003e7199410f6df5b920c180c5b7bfc175efda07 /net/switchdev/switchdev.c | |
| parent | ASoC: rt5677: add register patch for PLL (diff) | |
| download | kernel-60a8d62b8497c23eb3d48149af7e55dac2dd83a2.tar.gz kernel-60a8d62b8497c23eb3d48149af7e55dac2dd83a2.zip | |
ASoC: rt5677: fixed wrong DMIC ref clock
DMIC clock source is not from codec system clock directly. it is
generated from the division of system clock. And it should be 256 *
sample rate of AIF1.
Signed-off-by: Bard Liao <[email protected]>
Signed-off-by: Mark Brown <[email protected]>
Cc: [email protected]
Diffstat (limited to 'net/switchdev/switchdev.c')
0 files changed, 0 insertions, 0 deletions