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| author | Russell King (Oracle) <[email protected]> | 2022-06-07 11:28:47 +0000 |
|---|---|---|
| committer | Jakub Kicinski <[email protected]> | 2022-06-09 03:58:30 +0000 |
| commit | 2b4bb9cd9bcdbe1f791fec18a7c8728cb6989bf8 (patch) | |
| tree | 7fe1f894ae6b26bf85ad1292484f8a46ec6d5885 /net/switchdev/switchdev.c | |
| parent | net: dsa: mv88e6xxx: use BMSR_ANEGCOMPLETE bit for filling an_complete (diff) | |
| download | kernel-2b4bb9cd9bcdbe1f791fec18a7c8728cb6989bf8.tar.gz kernel-2b4bb9cd9bcdbe1f791fec18a7c8728cb6989bf8.zip | |
net: dsa: mv88e6xxx: fix BMSR error to be consistent with others
Other errors accessing the registers in mv88e6352_serdes_pcs_get_state()
print "PHY " before the register name, except for the BMSR. Make this
consistent with the other error messages.
Signed-off-by: Russell King (Oracle) <[email protected]>
Signed-off-by: Jakub Kicinski <[email protected]>
Diffstat (limited to 'net/switchdev/switchdev.c')
0 files changed, 0 insertions, 0 deletions