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| author | Shengjiu Wang <[email protected]> | 2022-05-16 08:06:12 +0000 |
|---|---|---|
| committer | Mark Brown <[email protected]> | 2022-05-16 11:58:08 +0000 |
| commit | af0bd3c0ffae8c11790ab0108787c03767869a9a (patch) | |
| tree | 392292e9078cdba34b2a1c4e9f36df50d64039e6 /lib/timerqueue.c | |
| parent | ASoC: fsl_sai: Add support for i.MX8M Plus (diff) | |
| download | kernel-af0bd3c0ffae8c11790ab0108787c03767869a9a.tar.gz kernel-af0bd3c0ffae8c11790ab0108787c03767869a9a.zip | |
ASoC: fsl_sai: Add support for i.MX8ULP
Add i.MX8ULP specific soc data, the max register is FSL_SAI_RTCAP
the IP version is also 0x0301, So version can't be used for the
condition of register FSL_SAI_MCTL setting.
Signed-off-by: Shengjiu Wang <[email protected]>
Reviewed-by: Fabio Estevam <[email protected]>
Link: https://lore.kernel.org/r/[email protected]
Signed-off-by: Mark Brown <[email protected]>
Diffstat (limited to 'lib/timerqueue.c')
0 files changed, 0 insertions, 0 deletions