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| author | Linus Torvalds <[email protected]> | 2025-10-17 23:04:21 +0000 |
|---|---|---|
| committer | Linus Torvalds <[email protected]> | 2025-10-17 23:04:21 +0000 |
| commit | f406055cb18c6e299c4a783fc1effeb16be41803 (patch) | |
| tree | f3d5a0b434bdafdb6ef4dad7bc249e8c4398d95b /lib/test_fortify/write_overflow-strlcpy-src.c | |
| parent | Merge tag 'riscv-for-linux-6.18-rc2' of git://git.kernel.org/pub/scm/linux/ke... (diff) | |
| parent | arm64: debug: always unmask interrupts in el0_softstp() (diff) | |
| download | kernel-f406055cb18c6e299c4a783fc1effeb16be41803.tar.gz kernel-f406055cb18c6e299c4a783fc1effeb16be41803.zip | |
Merge tag 'arm64-fixes' of git://git.kernel.org/pub/scm/linux/kernel/git/arm64/linux
Pull arm64 fixes from Catalin Marinas:
- Explicitly encode the XZR register if the value passed to
write_sysreg_s() is 0.
The GIC CDEOI instruction is encoded as a system register write with
XZR as the source register. However, clang does not honour the "Z"
register constraint, leading to incorrect code generation
- Ensure the interrupts (DAIF.IF) are unmasked when completing
single-step of a suspended breakpoint before calling
exit_to_user_mode().
With pseudo-NMIs, interrupts are (additionally) masked at the PMR_EL1
register, handled by local_irq_*()
* tag 'arm64-fixes' of git://git.kernel.org/pub/scm/linux/kernel/git/arm64/linux:
arm64: debug: always unmask interrupts in el0_softstp()
arm64/sysreg: Fix GIC CDEOI instruction encoding
Diffstat (limited to 'lib/test_fortify/write_overflow-strlcpy-src.c')
0 files changed, 0 insertions, 0 deletions