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| author | Alexandru Elisei <[email protected]> | 2025-11-12 10:28:53 +0000 |
|---|---|---|
| committer | Marc Zyngier <[email protected]> | 2025-11-12 10:52:58 +0000 |
| commit | 85592114ffda568b507bc2b04f5e9afbe7c13b62 (patch) | |
| tree | aae8f48c9d6faefb21ec370afaadb6b5ef6225a5 /lib/mpi/mpi-mpow.c | |
| parent | KVM: arm64: Finalize ID registers only once per VM (diff) | |
| download | kernel-85592114ffda568b507bc2b04f5e9afbe7c13b62.tar.gz kernel-85592114ffda568b507bc2b04f5e9afbe7c13b62.zip | |
KVM: arm64: VHE: Compute fgt traps before activating them
On VHE, the Fine Grain Traps registers are written to hardware in
kvm_arch_vcpu_load()->..->__activate_traps_hfgxtr(), but the fgt array is
computed later, in kvm_vcpu_load_fgt(). This can lead to zero being written
to the FGT registers the first time a VCPU is loaded. Also, any changes to
the fgt array will be visible only after the VCPU is scheduled out, and
then back in, which is not the intended behaviour.
Fix it by computing the fgt array just before the fgt traps are written
to hardware.
Fixes: fb10ddf35c1c ("KVM: arm64: Compute per-vCPU FGTs at vcpu_load()")
Signed-off-by: Alexandru Elisei <[email protected]>
Reviewed-by: Oliver Upton <[email protected]>
Link: https://patch.msgid.link/[email protected]
Signed-off-by: Marc Zyngier <[email protected]>
Diffstat (limited to 'lib/mpi/mpi-mpow.c')
0 files changed, 0 insertions, 0 deletions