diff options
| author | Soren Brinkmann <[email protected]> | 2013-06-17 22:47:40 +0000 |
|---|---|---|
| committer | Mike Turquette <[email protected]> | 2013-08-13 17:01:55 +0000 |
| commit | 765b7d4c4cb376465f81d0dd44b50861514dbcba (patch) | |
| tree | 4032473bae2c62edf6e78c2008e0ce564527e741 /lib/lockref.c | |
| parent | clk/zynq/clkc: Add dedicated spinlock for the SWDT (diff) | |
| download | kernel-765b7d4c4cb376465f81d0dd44b50861514dbcba.tar.gz kernel-765b7d4c4cb376465f81d0dd44b50861514dbcba.zip | |
clk/zynq/clkc: Add CLK_SET_RATE_PARENT flag to ethernet muxes
Zynq's Ethernet clocks are created by the following hierarchy:
mux0 ---> div0 ---> div1 ---> mux1 ---> gate
Rate change requests on the gate have to propagate all the way up to
div0 to properly leverage all dividers. Mux1 was missing the
CLK_SET_RATE_PARENT flag, which is required to achieve this.
This does not fix a specific regression but the clock driver was merged
for 3.11-rc1, so best to fix the known bugs before the release.
Signed-off-by: Soren Brinkmann <[email protected]>
Signed-off-by: Michal Simek <[email protected]>
Signed-off-by: Mike Turquette <[email protected]>
[[email protected]: added to changelog]
Diffstat (limited to 'lib/lockref.c')
0 files changed, 0 insertions, 0 deletions