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authorJason Wang <[email protected]>2010-08-21 08:24:05 +0000
committerSascha Hauer <[email protected]>2010-08-21 10:22:43 +0000
commit14f0f512ba6f4eccc9b7cf67be47439ed2917afb (patch)
tree6d4169cfbd10c5c7c8b27d7a24c9062432f3ee35 /lib/dynamic_debug.c
parentmx5/clock: fix clear bit fields issue in _clk_ccgr_disable function (diff)
downloadkernel-14f0f512ba6f4eccc9b7cf67be47439ed2917afb.tar.gz
kernel-14f0f512ba6f4eccc9b7cf67be47439ed2917afb.zip
ARM: imx: set cache line size to 64 bytes for i.MX5
The core of i.MX5 series is cortex-A8, its cache line size is 64 bytes instead of 32 bytes. Refer to the OMAP3's selection, we choose 64 bytes for i.MX5, this can increase a little bit performance when perform cache operations. Signed-off-by: Jason Wang <[email protected]> Signed-off-by: Sascha Hauer <[email protected]>
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