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| author | Valmantas Paliksa <[email protected]> | 2025-06-30 22:25:14 +0000 |
|---|---|---|
| committer | Vinod Koul <[email protected]> | 2025-07-22 12:28:44 +0000 |
| commit | c3fe7071e196e25789ecf90dbc9e8491a98884d7 (patch) | |
| tree | 4e26616ee32a4547592ef8df6404478b1bf7407d /lib/debugobjects.c | |
| parent | dt-bindings: phy: qcom,sc8280xp-qmp-pcie-phy: Update pcie phy bindings for QC... (diff) | |
| download | kernel-c3fe7071e196e25789ecf90dbc9e8491a98884d7.tar.gz kernel-c3fe7071e196e25789ecf90dbc9e8491a98884d7.zip | |
phy: rockchip-pcie: Enable all four lanes if required
Current code enables only Lane 0 because pwr_cnt will be incremented on
first call to the function. Let's reorder the enablement code to enable
all 4 lanes through GRF.
Reviewed-by: Neil Armstrong <[email protected]>
Reviewed-by: Robin Murphy <[email protected]>
Signed-off-by: Valmantas Paliksa <[email protected]>
Signed-off-by: Geraldo Nascimento <[email protected]>
Reviewed-by: Robin Murphy <[email protected]>
Reviewed-by: Neil Armstrong <[email protected]>
Link: https://lore.kernel.org/r/16b610aab34e069fd31d9f57260c10df2a968f80.1751322015.git.geraldogabriel@gmail.com
Signed-off-by: Vinod Koul <[email protected]>
Diffstat (limited to 'lib/debugobjects.c')
0 files changed, 0 insertions, 0 deletions