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| author | Jisheng Zhang <[email protected]> | 2022-08-29 14:57:42 +0000 |
|---|---|---|
| committer | Palmer Dabbelt <[email protected]> | 2022-10-07 03:03:48 +0000 |
| commit | 87f81e66e2e84c7e6056413703d732a99c20c09b (patch) | |
| tree | 6fad2e48300b4e4b0226520783c53036591d02ff /fs/proc/array.c | |
| parent | RISC-V: Print SSTC in canonical order (diff) | |
| download | kernel-87f81e66e2e84c7e6056413703d732a99c20c09b.tar.gz kernel-87f81e66e2e84c7e6056413703d732a99c20c09b.zip | |
riscv: enable THP_SWAP for RV64
I have a Sipeed Lichee RV dock board which only has 512MB DDR, so
memory optimizations such as swap on zram are helpful. As is seen
in commit d0637c505f8a ("arm64: enable THP_SWAP for arm64") and
commit bd4c82c22c367e ("mm, THP, swap: delay splitting THP after
swapped out"), THP_SWAP can improve the swap throughput significantly.
Enable THP_SWAP for RV64, testing the micro-benchmark which is
introduced by commit d0637c505f8a ("arm64: enable THP_SWAP for arm64")
shows below numbers on the Lichee RV dock board:
swp out bandwidth w/o patch: 66908 bytes/ms (mean of 10 tests)
swp out bandwidth w/ patch: 322638 bytes/ms (mean of 10 tests)
Improved by 382%!
Signed-off-by: Jisheng Zhang <[email protected]>
Reviewed-by: Andrew Jones <[email protected]>
Reviewed-by: Conor Dooley <[email protected]>
Link: https://lore.kernel.org/r/[email protected]/
Signed-off-by: Palmer Dabbelt <[email protected]>
Diffstat (limited to 'fs/proc/array.c')
0 files changed, 0 insertions, 0 deletions