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| author | Konrad Rzeszutek Wilk <[email protected]> | 2018-04-26 02:04:23 +0000 |
|---|---|---|
| committer | Thomas Gleixner <[email protected]> | 2018-05-03 11:55:49 +0000 |
| commit | 1115a859f33276fe8afb31c60cf9d8e657872558 (patch) | |
| tree | ec85ff6ac7ff25b03c8893f47a691b610f13db11 /fs/proc/array.c | |
| parent | x86/bugs/intel: Set proper CPU features and setup RDS (diff) | |
| download | kernel-1115a859f33276fe8afb31c60cf9d8e657872558.tar.gz kernel-1115a859f33276fe8afb31c60cf9d8e657872558.zip | |
x86/bugs: Whitelist allowed SPEC_CTRL MSR values
Intel and AMD SPEC_CTRL (0x48) MSR semantics may differ in the
future (or in fact use different MSRs for the same functionality).
As such a run-time mechanism is required to whitelist the appropriate MSR
values.
[ tglx: Made the variable __ro_after_init ]
Signed-off-by: Konrad Rzeszutek Wilk <[email protected]>
Signed-off-by: Thomas Gleixner <[email protected]>
Reviewed-by: Ingo Molnar <[email protected]>
Diffstat (limited to 'fs/proc/array.c')
0 files changed, 0 insertions, 0 deletions