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| author | Stephen Boyd <[email protected]> | 2011-03-23 21:46:15 +0000 |
|---|---|---|
| committer | Russell King <[email protected]> | 2011-03-28 18:01:43 +0000 |
| commit | dfad549d98b60160547d1b8299051b9456c8da85 (patch) | |
| tree | 3920e4931669c67e0f06955dfc667ee3aa0d566c /fs/jbd/commit.c | |
| parent | ARM: 6838/1: etm: fix section mismatch warning (diff) | |
| download | kernel-dfad549d98b60160547d1b8299051b9456c8da85.tar.gz kernel-dfad549d98b60160547d1b8299051b9456c8da85.zip | |
ARM: 6826/1: Merge v6 and v7 DEBUG_LL DCC support
The inline assembly differences for v6 vs. v7 are purely
optimizations. On a v7 processor, an mrc with the pc sets the
condition codes to the 28-31 bits of the register being read. It
just so happens that the TX/RX full bits the DCC support code is
testing for are high enough in the register to be put into the
condition codes. On a v6 processor, this "feature" isn't
implemented and thus we have to do the usual read, mask, test
operations to check for TX/RX full. Thus, we can drop the v7
implementation and just use the v6 implementation for both.
Cc: Tony Lindgren <[email protected]>
Signed-off-by: Stephen Boyd <[email protected]>
Signed-off-by: Russell King <[email protected]>
Diffstat (limited to 'fs/jbd/commit.c')
0 files changed, 0 insertions, 0 deletions