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| author | Takashi Iwai <[email protected]> | 2024-03-11 15:18:47 +0000 |
|---|---|---|
| committer | Takashi Iwai <[email protected]> | 2024-03-11 15:18:47 +0000 |
| commit | f5d9ddf1214bf878ca69c905c2f410c5b51de99c (patch) | |
| tree | 3ea7bf6f519a490f72cf5f9023b5c0a6dff0fea0 /drivers/spi/spi-sh-msiof.c | |
| parent | ALSA: scarlett2: Fix Scarlett 4th Gen input gain range again (diff) | |
| parent | ASoC: Intel: catpt: Carefully use PCI bitwise constants (diff) | |
| download | kernel-f5d9ddf1214bf878ca69c905c2f410c5b51de99c.tar.gz kernel-f5d9ddf1214bf878ca69c905c2f410c5b51de99c.zip | |
Merge tag 'asoc-v6.9' of https://git.kernel.org/pub/scm/linux/kernel/git/broonie/sound into for-linus
ASoC: Updates for v6.9
This has been quite a small release, there's a lot of driver specific
cleanups and minor enhancements but hardly anything on the core and only
one new driver. Highlights include:
- SoundWire support for AMD ACP 6.3 systems.
- Support for reporting version information for AVS firmware.
- Support DSPless mode for Intel Soundwire systems.
- Support for configuring CS35L56 amplifiers using EFI calibration
data.
- Log which component is being operated on as part of power management
trace events.
- Support for Microchip SAM9x7, NXP i.MX95 and Qualcomm WCD939x
Diffstat (limited to 'drivers/spi/spi-sh-msiof.c')
| -rw-r--r-- | drivers/spi/spi-sh-msiof.c | 16 |
1 files changed, 8 insertions, 8 deletions
diff --git a/drivers/spi/spi-sh-msiof.c b/drivers/spi/spi-sh-msiof.c index cfc3b1ddbd22..6f12e4fb2e2e 100644 --- a/drivers/spi/spi-sh-msiof.c +++ b/drivers/spi/spi-sh-msiof.c @@ -136,14 +136,14 @@ struct sh_msiof_spi_priv { /* SIFCTR */ #define SIFCTR_TFWM_MASK GENMASK(31, 29) /* Transmit FIFO Watermark */ -#define SIFCTR_TFWM_64 (0 << 29) /* Transfer Request when 64 empty stages */ -#define SIFCTR_TFWM_32 (1 << 29) /* Transfer Request when 32 empty stages */ -#define SIFCTR_TFWM_24 (2 << 29) /* Transfer Request when 24 empty stages */ -#define SIFCTR_TFWM_16 (3 << 29) /* Transfer Request when 16 empty stages */ -#define SIFCTR_TFWM_12 (4 << 29) /* Transfer Request when 12 empty stages */ -#define SIFCTR_TFWM_8 (5 << 29) /* Transfer Request when 8 empty stages */ -#define SIFCTR_TFWM_4 (6 << 29) /* Transfer Request when 4 empty stages */ -#define SIFCTR_TFWM_1 (7 << 29) /* Transfer Request when 1 empty stage */ +#define SIFCTR_TFWM_64 (0UL << 29) /* Transfer Request when 64 empty stages */ +#define SIFCTR_TFWM_32 (1UL << 29) /* Transfer Request when 32 empty stages */ +#define SIFCTR_TFWM_24 (2UL << 29) /* Transfer Request when 24 empty stages */ +#define SIFCTR_TFWM_16 (3UL << 29) /* Transfer Request when 16 empty stages */ +#define SIFCTR_TFWM_12 (4UL << 29) /* Transfer Request when 12 empty stages */ +#define SIFCTR_TFWM_8 (5UL << 29) /* Transfer Request when 8 empty stages */ +#define SIFCTR_TFWM_4 (6UL << 29) /* Transfer Request when 4 empty stages */ +#define SIFCTR_TFWM_1 (7UL << 29) /* Transfer Request when 1 empty stage */ #define SIFCTR_TFUA_MASK GENMASK(26, 20) /* Transmit FIFO Usable Area */ #define SIFCTR_TFUA_SHIFT 20 #define SIFCTR_TFUA(i) ((i) << SIFCTR_TFUA_SHIFT) |