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| author | Kashyap Desai <[email protected]> | 2021-05-20 15:25:44 +0000 |
|---|---|---|
| committer | Martin K. Petersen <[email protected]> | 2021-06-02 04:56:18 +0000 |
| commit | 74e1f30a28680978fa9ddfb5360d0cc644cd348e (patch) | |
| tree | 6cd04fdda3fe7b9a85fd00550800c06e1d1b2cf8 /drivers/scsi/mpi3mr/mpi3mr.h | |
| parent | scsi: mpi3mr: Add support for DSN secure firmware check (diff) | |
| download | kernel-74e1f30a28680978fa9ddfb5360d0cc644cd348e.tar.gz kernel-74e1f30a28680978fa9ddfb5360d0cc644cd348e.zip | |
scsi: mpi3mr: Add EEDP DIF DIX support
Link: https://lore.kernel.org/r/[email protected]
Cc: [email protected]
Reviewed-by: Hannes Reinecke <[email protected]>
Reviewed-by: Tomas Henzl <[email protected]>
Reviewed-by: Himanshu Madhani <[email protected]>
Signed-off-by: Kashyap Desai <[email protected]>
Signed-off-by: Martin K. Petersen <[email protected]>
Diffstat (limited to 'drivers/scsi/mpi3mr/mpi3mr.h')
| -rw-r--r-- | drivers/scsi/mpi3mr/mpi3mr.h | 5 |
1 files changed, 5 insertions, 0 deletions
diff --git a/drivers/scsi/mpi3mr/mpi3mr.h b/drivers/scsi/mpi3mr/mpi3mr.h index e7505b468a37..5d5529167350 100644 --- a/drivers/scsi/mpi3mr/mpi3mr.h +++ b/drivers/scsi/mpi3mr/mpi3mr.h @@ -123,6 +123,7 @@ extern struct list_head mrioc_list; #define MPI3MR_SENSEBUF_SZ 256 #define MPI3MR_SENSEBUF_FACTOR 3 #define MPI3MR_CHAINBUF_FACTOR 3 +#define MPI3MR_CHAINBUFDIX_FACTOR 2 /* Invalid target device handle */ #define MPI3MR_INVALID_DEV_HANDLE 0xFFFF @@ -562,17 +563,21 @@ struct chain_element { * * @host_tag: Host tag specific to operational queue * @in_lld_scope: Command in LLD scope or not + * @meta_sg_valid: DIX command with meta data SGL or not * @scmd: SCSI Command pointer * @req_q_idx: Operational request queue index * @chain_idx: Chain frame index + * @meta_chain_idx: Chain frame index of meta data SGL * @mpi3mr_scsiio_req: MPI SCSI IO request */ struct scmd_priv { u16 host_tag; u8 in_lld_scope; + u8 meta_sg_valid; struct scsi_cmnd *scmd; u16 req_q_idx; int chain_idx; + int meta_chain_idx; u8 mpi3mr_scsiio_req[MPI3MR_ADMIN_REQ_FRAME_SZ]; }; |