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| author | George Stark <[email protected]> | 2024-11-19 12:53:18 +0000 |
|---|---|---|
| committer | Uwe Kleine-König <[email protected]> | 2025-04-14 06:03:15 +0000 |
| commit | 5dca8a93b015c3362d5168bbe0bf109ac1b9bfa5 (patch) | |
| tree | 0748293bbc9b0e2a3c94bab34ab9ae182a864cfa /drivers/pwm/pwm-meson.c | |
| parent | pwm: meson: Use separate device id data for axg and g12 (diff) | |
| download | kernel-5dca8a93b015c3362d5168bbe0bf109ac1b9bfa5.tar.gz kernel-5dca8a93b015c3362d5168bbe0bf109ac1b9bfa5.zip | |
pwm: meson: Enable constant and polarity features for g12, axg, s4
g12, axg and s4 SoC families support constant and polarity bits
so enable those features in corresponding chip data structs.
Signed-off-by: George Stark <[email protected]>
Reviewed-by: Neil Armstrong <[email protected]>
Link: https://lore.kernel.org/r/[email protected]
Signed-off-by: Uwe Kleine-König <[email protected]>
Diffstat (limited to 'drivers/pwm/pwm-meson.c')
| -rw-r--r-- | drivers/pwm/pwm-meson.c | 14 |
1 files changed, 14 insertions, 0 deletions
diff --git a/drivers/pwm/pwm-meson.c b/drivers/pwm/pwm-meson.c index 3cc48c3dde5e..806e06c2b92e 100644 --- a/drivers/pwm/pwm-meson.c +++ b/drivers/pwm/pwm-meson.c @@ -554,26 +554,36 @@ static const struct meson_pwm_data pwm_gxbb_ao_data = { static const struct meson_pwm_data pwm_axg_ee_data = { .parent_names = { "xtal", "fclk_div5", "fclk_div4", "fclk_div3" }, .channels_init = meson_pwm_init_channels_meson8b_legacy, + .has_constant = true, + .has_polarity = true, }; static const struct meson_pwm_data pwm_axg_ao_data = { .parent_names = { "xtal", "axg_ao_clk81", "fclk_div4", "fclk_div5" }, .channels_init = meson_pwm_init_channels_meson8b_legacy, + .has_constant = true, + .has_polarity = true, }; static const struct meson_pwm_data pwm_g12a_ee_data = { .parent_names = { "xtal", NULL, "fclk_div4", "fclk_div3" }, .channels_init = meson_pwm_init_channels_meson8b_legacy, + .has_constant = true, + .has_polarity = true, }; static const struct meson_pwm_data pwm_g12a_ao_ab_data = { .parent_names = { "xtal", "g12a_ao_clk81", "fclk_div4", "fclk_div5" }, .channels_init = meson_pwm_init_channels_meson8b_legacy, + .has_constant = true, + .has_polarity = true, }; static const struct meson_pwm_data pwm_g12a_ao_cd_data = { .parent_names = { "xtal", "g12a_ao_clk81", NULL, NULL }, .channels_init = meson_pwm_init_channels_meson8b_legacy, + .has_constant = true, + .has_polarity = true, }; static const struct meson_pwm_data pwm_meson8_v2_data = { @@ -582,10 +592,14 @@ static const struct meson_pwm_data pwm_meson8_v2_data = { static const struct meson_pwm_data pwm_meson_axg_v2_data = { .channels_init = meson_pwm_init_channels_meson8b_v2, + .has_constant = true, + .has_polarity = true, }; static const struct meson_pwm_data pwm_s4_data = { .channels_init = meson_pwm_init_channels_s4, + .has_constant = true, + .has_polarity = true, }; static const struct of_device_id meson_pwm_matches[] = { |