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| author | Borislav Petkov <[email protected]> | 2022-04-05 15:15:15 +0000 |
|---|---|---|
| committer | Will Deacon <[email protected]> | 2022-04-08 13:17:57 +0000 |
| commit | d02b4dd84e1a90f7f1444d027c0289bf355b0d5a (patch) | |
| tree | a1b81b8919f940cc14edb1648ab09e0353bc7206 /drivers/perf/fsl_imx8_ddr_perf.c | |
| parent | arm64: Add part number for Arm Cortex-A78AE (diff) | |
| download | kernel-d02b4dd84e1a90f7f1444d027c0289bf355b0d5a.tar.gz kernel-d02b4dd84e1a90f7f1444d027c0289bf355b0d5a.zip | |
perf/imx_ddr: Fix undefined behavior due to shift overflowing the constant
Fix:
In file included from <command-line>:0:0:
In function ‘ddr_perf_counter_enable’,
inlined from ‘ddr_perf_irq_handler’ at drivers/perf/fsl_imx8_ddr_perf.c:651:2:
././include/linux/compiler_types.h:352:38: error: call to ‘__compiletime_assert_729’ \
declared with attribute error: FIELD_PREP: mask is not constant
_compiletime_assert(condition, msg, __compiletime_assert_, __COUNTER__)
...
See https://lore.kernel.org/r/YkwQ6%[email protected] for the gory
details as to why it triggers with older gccs only.
Signed-off-by: Borislav Petkov <[email protected]>
Cc: Frank Li <[email protected]>
Cc: Will Deacon <[email protected]>
Cc: Mark Rutland <[email protected]>
Cc: Shawn Guo <[email protected]>
Cc: Sascha Hauer <[email protected]>
Cc: Pengutronix Kernel Team <[email protected]>
Cc: Fabio Estevam <[email protected]>
Cc: NXP Linux Team <[email protected]>
Cc: [email protected]
Acked-by: Will Deacon <[email protected]>
Link: https://lore.kernel.org/r/[email protected]
Signed-off-by: Will Deacon <[email protected]>
Diffstat (limited to 'drivers/perf/fsl_imx8_ddr_perf.c')
| -rw-r--r-- | drivers/perf/fsl_imx8_ddr_perf.c | 2 |
1 files changed, 1 insertions, 1 deletions
diff --git a/drivers/perf/fsl_imx8_ddr_perf.c b/drivers/perf/fsl_imx8_ddr_perf.c index 94ebc1ecace7..b1b2a55de77f 100644 --- a/drivers/perf/fsl_imx8_ddr_perf.c +++ b/drivers/perf/fsl_imx8_ddr_perf.c @@ -29,7 +29,7 @@ #define CNTL_OVER_MASK 0xFFFFFFFE #define CNTL_CSV_SHIFT 24 -#define CNTL_CSV_MASK (0xFF << CNTL_CSV_SHIFT) +#define CNTL_CSV_MASK (0xFFU << CNTL_CSV_SHIFT) #define EVENT_CYCLES_ID 0 #define EVENT_CYCLES_COUNTER 0 |