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| author | Joel Stanley <[email protected]> | 2018-02-20 01:43:29 +0000 |
|---|---|---|
| committer | Philipp Zabel <[email protected]> | 2018-02-20 16:42:29 +0000 |
| commit | 1d7592f84f92c6344978186fdbe547af044274b5 (patch) | |
| tree | c185c0f0b87fbe999c5bd9ccf52c28450a3bd3bb /drivers/perf/arm-ccn.c | |
| parent | dt-bindings: aspeed-lpc: Add reset controller (diff) | |
| download | kernel-1d7592f84f92c6344978186fdbe547af044274b5.tar.gz kernel-1d7592f84f92c6344978186fdbe547af044274b5.zip | |
reset: simple: Enable for ASPEED systems
ASPEED BMC SoCs have a reset controller in the LPC IP that can be
controlled using this driver to release the UARTs from reset.
No special configuration is required, so only the compatible string is
added.
Signed-off-by: Joel Stanley <[email protected]>
Signed-off-by: Philipp Zabel <[email protected]>
Diffstat (limited to 'drivers/perf/arm-ccn.c')
0 files changed, 0 insertions, 0 deletions