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authorMikulas Patocka <[email protected]>2018-03-08 13:25:24 +0000
committerMike Snitzer <[email protected]>2018-06-08 15:59:51 +0000
commit48debafe4f2feabcc99f8e2659e80557e3ca6b39 (patch)
tree898a7c9c33238b068a79d40e97c380b36b1498ee /drivers/pci/controller/dwc
parentdm: adjust structure members to improve alignment (diff)
downloadkernel-48debafe4f2feabcc99f8e2659e80557e3ca6b39.tar.gz
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dm: add writecache target
The writecache target caches writes on persistent memory or SSD. It is intended for databases or other programs that need extremely low commit latency. The writecache target doesn't cache reads because reads are supposed to be cached in page cache in normal RAM. If persistent memory isn't available this target can still be used in SSD mode. Signed-off-by: Mikulas Patocka <[email protected]> Signed-off-by: Colin Ian King <[email protected]> # fix missing goto Signed-off-by: Ross Zwisler <[email protected]> # fix compilation issue with !DAX Signed-off-by: Dan Carpenter <[email protected]> # use msecs_to_jiffies Acked-by: Dan Williams <[email protected]> # reworks to unify ARM and x86 flushing Signed-off-by: Mike Snitzer <[email protected]>
Diffstat (limited to 'drivers/pci/controller/dwc')
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