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| author | D M, Sharath Kumar <[email protected]> | 2025-02-21 17:04:52 +0000 |
|---|---|---|
| committer | Krzysztof Wilczyński <[email protected]> | 2025-03-06 09:52:48 +0000 |
| commit | 60f2ee5f1472972918de7eb14c8240de176f6b8d (patch) | |
| tree | 07221759f79e8c5c23bc53f4a29445937f7b3bef /drivers/pci/controller/dwc/pcie-uniphier.c | |
| parent | dt-bindings: PCI: altera: Add binding for Agilex (diff) | |
| download | kernel-60f2ee5f1472972918de7eb14c8240de176f6b8d.tar.gz kernel-60f2ee5f1472972918de7eb14c8240de176f6b8d.zip | |
PCI: altera: Add Agilex support
Add PCIe Root Port controller support for the Agilex family of chips.
The Agilex PCIe Hard IP has three variants that are mostly software
compatible, except for a couple register offsets. The P-Tile variant
supports Gen3/Gen4 1x16. The F-Tile variant supports Gen3/Gen4 4x4,
4x8, and 4x16. The R-Tile variant improves on the F-Tile variant by
adding Gen5 support.
To simplify the implementation of pci_ops read/write functions,
ep_{read/write}_cfg() callbacks were added to struct altera_pci_ops
to easily distinguish between hardware variants.
Signed-off-by: D M, Sharath Kumar <[email protected]>
Signed-off-by: Matthew Gerlach <[email protected]>
Reviewed-by: Manivannan Sadhasivam <[email protected]>
Link: https://lore.kernel.org/r/[email protected]
[kwilczynski: tidy code comments]
Signed-off-by: Krzysztof Wilczyński <[email protected]>
Diffstat (limited to 'drivers/pci/controller/dwc/pcie-uniphier.c')
0 files changed, 0 insertions, 0 deletions