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| author | Manivannan Sadhasivam <[email protected]> | 2024-09-11 15:26:26 +0000 |
|---|---|---|
| committer | Krzysztof Wilczyński <[email protected]> | 2024-09-13 14:44:43 +0000 |
| commit | 2cebf68a24abb0552ea59cf928829acd51f8b175 (patch) | |
| tree | 7a72db868dffd68c5874b4f3bbef7d48ffe907cb /drivers/pci/controller/dwc/pcie-tegra194.c | |
| parent | PCI: qcom-ep: Enable controller resources like PHY only after refclk is avail... (diff) | |
| download | kernel-2cebf68a24abb0552ea59cf928829acd51f8b175.tar.gz kernel-2cebf68a24abb0552ea59cf928829acd51f8b175.zip | |
PCI: dwc: Rename 'dw_pcie::link_gen' to 'dw_pcie::max_link_speed'
The 'link_gen' field is now holding the maximum supported link speed set
either by the controller driver or by DT through 'max-link-speed'
property.
However, the name 'link_gen' sounds like the negotiated link speed of
the PCIe link.
So rename it to 'max_link_speed' to make it clear that it holds the
maximum supported link speed of the controller.
Link: https://lore.kernel.org/linux-pci/[email protected]
Tested-by: Johan Hovold <[email protected]>
Signed-off-by: Manivannan Sadhasivam <[email protected]>
[kwilczynski: commit log]
Signed-off-by: Krzysztof Wilczyński <[email protected]>
Reviewed-by: Frank Li <[email protected]>
Reviewed-by: Johan Hovold <[email protected]>
Diffstat (limited to 'drivers/pci/controller/dwc/pcie-tegra194.c')
0 files changed, 0 insertions, 0 deletions