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| author | Niklas Cassel <[email protected]> | 2025-06-25 10:23:50 +0000 |
|---|---|---|
| committer | Manivannan Sadhasivam <[email protected]> | 2025-06-25 13:25:52 +0000 |
| commit | 15b6b243cc2b1017cf89e2477aa0b4e1a306a82a (patch) | |
| tree | d1e10fc36e0bd4de32bd6c804b88e412f847ffc5 /drivers/pci/controller/dwc/pcie-qcom-ep.c | |
| parent | PCI: dw-rockchip: Wait PCIE_RESET_CONFIG_WAIT_MS after link-up IRQ (diff) | |
| download | kernel-15b6b243cc2b1017cf89e2477aa0b4e1a306a82a.tar.gz kernel-15b6b243cc2b1017cf89e2477aa0b4e1a306a82a.zip | |
PCI: qcom: Wait PCIE_RESET_CONFIG_WAIT_MS after link-up IRQ
Per PCIe r6.0, sec 6.6.1, software must generally wait a minimum of
100ms (PCIE_RESET_CONFIG_WAIT_MS) after Link training completes before
sending a Configuration Request.
Prior to 36971d6c5a9a ("PCI: qcom: Don't wait for link if we can detect
Link Up"), qcom used dw_pcie_wait_for_link(), which waited between 0
and 90ms after the link came up before we enumerate the bus, and this
was apparently enough for most devices.
After 36971d6c5a9a, qcom_pcie_global_irq_thread() started enumeration
immediately when handling the link-up IRQ, and devices (e.g., Laszlo
Fiat's PLEXTOR PX-256M8PeGN NVMe SSD) may not be ready to handle config
requests yet.
Delay PCIE_RESET_CONFIG_WAIT_MS after the link-up IRQ before starting
enumeration.
Fixes: 82a823833f4e ("PCI: qcom: Add Qualcomm PCIe controller driver")
Signed-off-by: Niklas Cassel <[email protected]>
Signed-off-by: Manivannan Sadhasivam <[email protected]>
Reviewed-by: Damien Le Moal <[email protected]>
Reviewed-by: Wilfred Mallawa <[email protected]>
Link: https://patch.msgid.link/[email protected]
Diffstat (limited to 'drivers/pci/controller/dwc/pcie-qcom-ep.c')
0 files changed, 0 insertions, 0 deletions