diff options
| author | Frank Li <[email protected]> | 2025-03-15 20:15:37 +0000 |
|---|---|---|
| committer | Bjorn Helgaas <[email protected]> | 2025-03-17 19:18:53 +0000 |
| commit | 513ef9c4965b0077037db97f8481d00b5c7ee994 (patch) | |
| tree | 5eb62a92fb1b0ec858e6123d32d5e6569a65815b /drivers/pci/controller/dwc/pcie-designware-host.c | |
| parent | PCI: dwc: Use resource start as ioremap() input in dw_pcie_pme_turn_off() (diff) | |
| download | kernel-513ef9c4965b0077037db97f8481d00b5c7ee994.tar.gz kernel-513ef9c4965b0077037db97f8481d00b5c7ee994.zip | |
PCI: dwc: Rename cpu_addr to parent_bus_addr for ATU configuration
Rename 'cpu_addr' to 'parent_bus_addr' in the DesignWare ATU configuration.
The ATU translates parent bus addresses to PCI addresses, which are often
the same as CPU addresses but can differ in systems where the bus fabric
translates addresses before passing them to the PCIe controller. This
renaming clarifies the purpose and avoids confusion.
Link: https://lore.kernel.org/r/[email protected]
Signed-off-by: Frank Li <[email protected]>
Signed-off-by: Bjorn Helgaas <[email protected]>
Diffstat (limited to 'drivers/pci/controller/dwc/pcie-designware-host.c')
| -rw-r--r-- | drivers/pci/controller/dwc/pcie-designware-host.c | 12 |
1 files changed, 6 insertions, 6 deletions
diff --git a/drivers/pci/controller/dwc/pcie-designware-host.c b/drivers/pci/controller/dwc/pcie-designware-host.c index ae3fd2a5dbf8..1206b26bff3f 100644 --- a/drivers/pci/controller/dwc/pcie-designware-host.c +++ b/drivers/pci/controller/dwc/pcie-designware-host.c @@ -616,7 +616,7 @@ static void __iomem *dw_pcie_other_conf_map_bus(struct pci_bus *bus, type = PCIE_ATU_TYPE_CFG1; atu.type = type; - atu.cpu_addr = pp->cfg0_base; + atu.parent_bus_addr = pp->cfg0_base; atu.pci_addr = busdev; atu.size = pp->cfg0_size; @@ -641,7 +641,7 @@ static int dw_pcie_rd_other_conf(struct pci_bus *bus, unsigned int devfn, if (pp->cfg0_io_shared) { atu.type = PCIE_ATU_TYPE_IO; - atu.cpu_addr = pp->io_base; + atu.parent_bus_addr = pp->io_base; atu.pci_addr = pp->io_bus_addr; atu.size = pp->io_size; @@ -667,7 +667,7 @@ static int dw_pcie_wr_other_conf(struct pci_bus *bus, unsigned int devfn, if (pp->cfg0_io_shared) { atu.type = PCIE_ATU_TYPE_IO; - atu.cpu_addr = pp->io_base; + atu.parent_bus_addr = pp->io_base; atu.pci_addr = pp->io_bus_addr; atu.size = pp->io_size; @@ -736,7 +736,7 @@ static int dw_pcie_iatu_setup(struct dw_pcie_rp *pp) atu.index = i; atu.type = PCIE_ATU_TYPE_MEM; - atu.cpu_addr = entry->res->start; + atu.parent_bus_addr = entry->res->start; atu.pci_addr = entry->res->start - entry->offset; /* Adjust iATU size if MSG TLP region was allocated before */ @@ -758,7 +758,7 @@ static int dw_pcie_iatu_setup(struct dw_pcie_rp *pp) if (pci->num_ob_windows > ++i) { atu.index = i; atu.type = PCIE_ATU_TYPE_IO; - atu.cpu_addr = pp->io_base; + atu.parent_bus_addr = pp->io_base; atu.pci_addr = pp->io_bus_addr; atu.size = pp->io_size; @@ -902,7 +902,7 @@ static int dw_pcie_pme_turn_off(struct dw_pcie *pci) atu.size = resource_size(pci->pp.msg_res); atu.index = pci->pp.msg_atu_index; - atu.cpu_addr = pci->pp.msg_res->start; + atu.parent_bus_addr = pci->pp.msg_res->start; ret = dw_pcie_prog_outbound_atu(pci, &atu); if (ret) |