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authorKrishna Chaitanya Chundru <[email protected]>2025-07-02 11:20:41 +0000
committerBjorn Helgaas <[email protected]>2025-07-15 18:22:04 +0000
commit38fcbfbd4207ec3fe47f66c2a16df7f5a857e198 (patch)
tree1c86fc009632e437f1127ae9f1ad13fe4b162073 /drivers/pci/controller/dwc/pcie-designware-host.c
parentPCI: qcom: Add support for Qualcomm SA8255p based PCIe Root Complex (diff)
downloadkernel-38fcbfbd4207ec3fe47f66c2a16df7f5a857e198.tar.gz
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dt-bindings: PCI: qcom: Move PHY & reset GPIO to Root Port node
Move the phys, phy-names, reset-gpios properties to the PCIe Root Port node from Host Bridge node, as agreed upon here [1]. Update the qcom,pcie-common.yaml to include the 'phys' property in the Root Port node. 'phy-names' property is not needed in Root Port since each Root Port supports only one PHY. Also, there is already 'reset-gpios' property defined for PERST# in pci-bus-common.yaml, so use that property instead of 'perst-gpios'. For backward compatibility, do not remove any existing properties in the bridge node, but mark them as 'deprecated' instead. [1] https://lore.kernel.org/linux-pci/20241211192014.GA3302752@bhelgaas/ Signed-off-by: Krishna Chaitanya Chundru <[email protected]> [mani: commit message rewording] Signed-off-by: Manivannan Sadhasivam <[email protected]> Signed-off-by: Bjorn Helgaas <[email protected]> Reviewed-by: Rob Herring (Arm) <[email protected]> Link: https://patch.msgid.link/[email protected]
Diffstat (limited to 'drivers/pci/controller/dwc/pcie-designware-host.c')
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