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| author | Rob Herring <[email protected]> | 2020-11-05 21:11:45 +0000 |
|---|---|---|
| committer | Lorenzo Pieralisi <[email protected]> | 2020-11-19 10:51:40 +0000 |
| commit | 1d567aac46101c8743e49990b94560f86740bb1e (patch) | |
| tree | dc00c61ce7fc2d8a217a313a98ad0c9cbbd31af3 /drivers/pci/controller/dwc/pci-layerscape-ep.c | |
| parent | PCI: dwc: Add support to program ATU for >4GB memory (diff) | |
| download | kernel-1d567aac46101c8743e49990b94560f86740bb1e.tar.gz kernel-1d567aac46101c8743e49990b94560f86740bb1e.zip | |
PCI: dwc/intel-gw: Move ATU offset out of driver match data
The ATU offset should be a register range in DT called 'atu', not driver
match data. Any future platforms with a different ATU offset should add
it to their DT.
This is also in preparation to do DBI resource setup in the core DWC
code, so let's move setting atu_base later in intel_pcie_rc_setup().
Link: https://lore.kernel.org/r/[email protected]
Tested-by: Marek Szyprowski <[email protected]>
Signed-off-by: Rob Herring <[email protected]>
Signed-off-by: Lorenzo Pieralisi <[email protected]>
Cc: Lorenzo Pieralisi <[email protected]>
Cc: Bjorn Helgaas <[email protected]>
Diffstat (limited to 'drivers/pci/controller/dwc/pci-layerscape-ep.c')
0 files changed, 0 insertions, 0 deletions