diff options
| author | Sergey Temerkhanov <[email protected]> | 2024-08-30 11:07:23 +0000 |
|---|---|---|
| committer | Tony Nguyen <[email protected]> | 2024-10-01 18:11:38 +0000 |
| commit | 5a4f45c435fadecd09497a7b9931f668a93db3cf (patch) | |
| tree | 3c0bf759444a880d3d98d926483c2cdcb961a5a1 /drivers/net/ethernet/intel/ice/ice_ptp.c | |
| parent | ice: Read SDP section from NVM for pin definitions (diff) | |
| download | kernel-5a4f45c435fadecd09497a7b9931f668a93db3cf.tar.gz kernel-5a4f45c435fadecd09497a7b9931f668a93db3cf.zip | |
ice: Enable 1PPS out from CGU for E825C products
Implement configuring 1PPS signal output from CGU. Use maximal amplitude
because Linux PTP pin API does not have any way for user to set signal
level.
This change is necessary for E825C products to properly output any
signal from 1PPS pin.
Reviewed-by: Arkadiusz Kubalewski <[email protected]>
Signed-off-by: Sergey Temerkhanov <[email protected]>
Co-developed-by: Karol Kolacinski <[email protected]>
Signed-off-by: Karol Kolacinski <[email protected]>
Reviewed-by: Simon Horman <[email protected]>
Tested-by: Pucha Himasekhar Reddy <[email protected]> (A Contingent worker at Intel)
Signed-off-by: Tony Nguyen <[email protected]>
Diffstat (limited to 'drivers/net/ethernet/intel/ice/ice_ptp.c')
| -rw-r--r-- | drivers/net/ethernet/intel/ice/ice_ptp.c | 10 |
1 files changed, 10 insertions, 0 deletions
diff --git a/drivers/net/ethernet/intel/ice/ice_ptp.c b/drivers/net/ethernet/intel/ice/ice_ptp.c index 753709ef1ab2..382aa8d9a23a 100644 --- a/drivers/net/ethernet/intel/ice/ice_ptp.c +++ b/drivers/net/ethernet/intel/ice/ice_ptp.c @@ -4,6 +4,7 @@ #include "ice.h" #include "ice_lib.h" #include "ice_trace.h" +#include "ice_cgu_regs.h" static const char ice_pin_names[][64] = { "SDP0", @@ -1699,6 +1700,15 @@ static int ice_ptp_write_perout(struct ice_hw *hw, unsigned int chan, /* 0. Reset mode & out_en in AUX_OUT */ wr32(hw, GLTSYN_AUX_OUT(chan, tmr_idx), 0); + if (ice_is_e825c(hw)) { + int err; + + /* Enable/disable CGU 1PPS output for E825C */ + err = ice_cgu_cfg_pps_out(hw, !!period); + if (err) + return err; + } + /* 1. Write perout with half of required period value. * HW toggles output when source clock hits the TGT and then adds * GLTSYN_CLKO value to the target, so it ends up with 50% duty cycle. |