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authorSergio Paracuellos <[email protected]>2021-05-14 11:28:20 +0000
committerGreg Kroah-Hartman <[email protected]>2021-05-14 11:54:03 +0000
commit519c49678a1311d7ec748660ef1f9d9753970cf1 (patch)
tree1833db981eb97fb4ee8b98a11d6e52274243f30f /drivers/iio/trigger/stm32-timer-trigger.c
parentstaging: rtl8723bs: remove unused argument 'msg' (diff)
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staging: mt7621-dts: use clock in pci phy nodes
MT7621 SoC clock driver has already mainlined in 'commit 48df7a26f470 ("clk: ralink: add clock driver for mt7621 SoC")' Hence we can use the clock in pcie phy nodes to be able to get it from there in driver code. Signed-off-by: Sergio Paracuellos <[email protected]> Link: https://lore.kernel.org/r/[email protected] Signed-off-by: Greg Kroah-Hartman <[email protected]>
Diffstat (limited to 'drivers/iio/trigger/stm32-timer-trigger.c')
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