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| author | Linus Walleij <[email protected]> | 2015-12-21 08:36:21 +0000 |
|---|---|---|
| committer | Linus Walleij <[email protected]> | 2015-12-21 08:36:21 +0000 |
| commit | 0529357f102b96f68bc199f858d1c3b07f4b674c (patch) | |
| tree | eaa047952a768099e00a5245afa0d84799df6990 /drivers/i2c/busses/i2c-davinci.c | |
| parent | gpio: pch: fix non-DT build (diff) | |
| parent | Linux 4.4-rc6 (diff) | |
| download | kernel-0529357f102b96f68bc199f858d1c3b07f4b674c.tar.gz kernel-0529357f102b96f68bc199f858d1c3b07f4b674c.zip | |
Merge tag 'v4.4-rc6' into devel
Linux 4.4-rc6
Diffstat (limited to 'drivers/i2c/busses/i2c-davinci.c')
| -rw-r--r-- | drivers/i2c/busses/i2c-davinci.c | 11 |
1 files changed, 9 insertions, 2 deletions
diff --git a/drivers/i2c/busses/i2c-davinci.c b/drivers/i2c/busses/i2c-davinci.c index c5628a42170a..a8bdcb5292f5 100644 --- a/drivers/i2c/busses/i2c-davinci.c +++ b/drivers/i2c/busses/i2c-davinci.c @@ -202,8 +202,15 @@ static void i2c_davinci_calc_clk_dividers(struct davinci_i2c_dev *dev) * d is always 6 on Keystone I2C controller */ - /* get minimum of 7 MHz clock, but max of 12 MHz */ - psc = (input_clock / 7000000) - 1; + /* + * Both Davinci and current Keystone User Guides recommend a value + * between 7MHz and 12MHz. In reality 7MHz module clock doesn't + * always produce enough margin between SDA and SCL transitions. + * Measurements show that the higher the module clock is, the + * bigger is the margin, providing more reliable communication. + * So we better target for 12MHz. + */ + psc = (input_clock / 12000000) - 1; if ((input_clock / (psc + 1)) > 12000000) psc++; /* better to run under spec than over */ d = (psc >= 2) ? 5 : 7 - psc; |