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| author | Maíra Canal <[email protected]> | 2025-07-14 22:07:02 +0000 |
|---|---|---|
| committer | Maíra Canal <[email protected]> | 2025-07-15 11:27:00 +0000 |
| commit | 0a5dc1b67ef5c7e851b57764a2aab8cc4341a7b7 (patch) | |
| tree | b671e0c65cd43d1daff4adc64a3d46795a2e4eaa /drivers/gpu/drm/scheduler/sched_main.c | |
| parent | dt-bindings: display: rockchip,dw-mipi-dsi: Drop address/size cells (diff) | |
| download | kernel-0a5dc1b67ef5c7e851b57764a2aab8cc4341a7b7.tar.gz kernel-0a5dc1b67ef5c7e851b57764a2aab8cc4341a7b7.zip | |
drm/sched: Rename DRM_GPU_SCHED_STAT_NOMINAL to DRM_GPU_SCHED_STAT_RESET
Among the scheduler's statuses, the only one that indicates an error is
DRM_GPU_SCHED_STAT_ENODEV. Any status other than DRM_GPU_SCHED_STAT_ENODEV
signifies that the operation succeeded and the GPU is in a nominal state.
However, to provide more information about the GPU's status, it is needed
to convey more information than just "OK".
Therefore, rename DRM_GPU_SCHED_STAT_NOMINAL to
DRM_GPU_SCHED_STAT_RESET, which better communicates the meaning of this
status. The status DRM_GPU_SCHED_STAT_RESET indicates that the GPU has
hung, but it has been successfully reset and is now in a nominal state
again.
Reviewed-by: Philipp Stanner <[email protected]>
Link: https://lore.kernel.org/r/[email protected]
Signed-off-by: Maíra Canal <[email protected]>
Diffstat (limited to 'drivers/gpu/drm/scheduler/sched_main.c')
| -rw-r--r-- | drivers/gpu/drm/scheduler/sched_main.c | 2 |
1 files changed, 1 insertions, 1 deletions
diff --git a/drivers/gpu/drm/scheduler/sched_main.c b/drivers/gpu/drm/scheduler/sched_main.c index d94270cf8bf5..4f2593f0c7d9 100644 --- a/drivers/gpu/drm/scheduler/sched_main.c +++ b/drivers/gpu/drm/scheduler/sched_main.c @@ -527,7 +527,7 @@ static void drm_sched_job_timedout(struct work_struct *work) { struct drm_gpu_scheduler *sched; struct drm_sched_job *job; - enum drm_gpu_sched_stat status = DRM_GPU_SCHED_STAT_NOMINAL; + enum drm_gpu_sched_stat status = DRM_GPU_SCHED_STAT_RESET; sched = container_of(work, struct drm_gpu_scheduler, work_tdr.work); |