diff options
| author | Rob Clark <[email protected]> | 2021-06-10 21:44:13 +0000 |
|---|---|---|
| committer | Rob Clark <[email protected]> | 2021-06-23 14:33:55 +0000 |
| commit | e25e92e08e32c6bf63a968929d232f13dcf9938c (patch) | |
| tree | fbe3898e124d71c6d4e5351cfd490a2e96b550b8 /drivers/gpu/drm/msm/msm_gpu.h | |
| parent | iommu/arm-smmu-qcom: Add stall support (diff) | |
| download | kernel-e25e92e08e32c6bf63a968929d232f13dcf9938c.tar.gz kernel-e25e92e08e32c6bf63a968929d232f13dcf9938c.zip | |
drm/msm: devcoredump iommu fault support
Wire up support to stall the SMMU on iova fault, and collect a devcore-
dump snapshot for easier debugging of faults.
Currently this is a6xx-only, but mostly only because so far it is the
only one using adreno-smmu-priv.
Signed-off-by: Rob Clark <[email protected]>
Acked-by: Jordan Crouse <[email protected]>
Link: https://lore.kernel.org/r/[email protected]
Signed-off-by: Rob Clark <[email protected]>
Diffstat (limited to 'drivers/gpu/drm/msm/msm_gpu.h')
| -rw-r--r-- | drivers/gpu/drm/msm/msm_gpu.h | 17 |
1 files changed, 17 insertions, 0 deletions
diff --git a/drivers/gpu/drm/msm/msm_gpu.h b/drivers/gpu/drm/msm/msm_gpu.h index fdc5851355af..ef41ec09f59c 100644 --- a/drivers/gpu/drm/msm/msm_gpu.h +++ b/drivers/gpu/drm/msm/msm_gpu.h @@ -71,6 +71,15 @@ struct msm_gpu_funcs { uint32_t (*get_rptr)(struct msm_gpu *gpu, struct msm_ringbuffer *ring); }; +/* Additional state for iommu faults: */ +struct msm_gpu_fault_info { + u64 ttbr0; + unsigned long iova; + int flags; + const char *type; + const char *block; +}; + struct msm_gpu { const char *name; struct drm_device *dev; @@ -125,6 +134,12 @@ struct msm_gpu { #define DRM_MSM_HANGCHECK_DEFAULT_PERIOD 500 /* in ms */ struct timer_list hangcheck_timer; + /* Fault info for most recent iova fault: */ + struct msm_gpu_fault_info fault_info; + + /* work for handling GPU ioval faults: */ + struct kthread_work fault_work; + /* work for handling GPU recovery: */ struct kthread_work recover_work; @@ -232,6 +247,8 @@ struct msm_gpu_state { char *comm; char *cmd; + struct msm_gpu_fault_info fault_info; + int nr_bos; struct msm_gpu_state_bo *bos; }; |
