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authorDmitry Baryshkov <[email protected]>2021-08-05 17:08:17 +0000
committerRob Clark <[email protected]>2021-08-10 22:30:32 +0000
commit858c595a3f5d66db1ed003fdefef374ea4a8c961 (patch)
tree0e25a96cde6dc76af6e776784fa0206cf14fb375 /drivers/gpu/drm/msm/dsi/phy/dsi_phy.h
parentdrm/msm/dp: add drm debug logs to dp_pm_resume/suspend (diff)
downloadkernel-858c595a3f5d66db1ed003fdefef374ea4a8c961.tar.gz
kernel-858c595a3f5d66db1ed003fdefef374ea4a8c961.zip
drm/msm/dsi: add continuous clock support for 7nm PHY
Unlike previous generations, 7nm PHYs are required to collaborate with the host for continuos clock mode. Add changes neccessary to enable continuous clock mode in the 7nm DSI PHYs. Signed-off-by: Dmitry Baryshkov <[email protected]> Link: https://lore.kernel.org/r/[email protected] [Fix merge conflict, and $description typo] Signed-off-by: Rob Clark <[email protected]>
Diffstat (limited to 'drivers/gpu/drm/msm/dsi/phy/dsi_phy.h')
-rw-r--r--drivers/gpu/drm/msm/dsi/phy/dsi_phy.h1
1 files changed, 1 insertions, 0 deletions
diff --git a/drivers/gpu/drm/msm/dsi/phy/dsi_phy.h b/drivers/gpu/drm/msm/dsi/phy/dsi_phy.h
index 4beed07db49c..b91303ada74f 100644
--- a/drivers/gpu/drm/msm/dsi/phy/dsi_phy.h
+++ b/drivers/gpu/drm/msm/dsi/phy/dsi_phy.h
@@ -24,6 +24,7 @@ struct msm_dsi_phy_ops {
void (*disable)(struct msm_dsi_phy *phy);
void (*save_pll_state)(struct msm_dsi_phy *phy);
int (*restore_pll_state)(struct msm_dsi_phy *phy);
+ bool (*set_continuous_clock)(struct msm_dsi_phy *phy, bool enable);
};
struct msm_dsi_phy_cfg {