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authorDmitry Baryshkov <[email protected]>2021-03-31 10:57:21 +0000
committerRob Clark <[email protected]>2021-04-07 18:05:45 +0000
commit5d13459650b3668edcd6d180787aac38d001c4ed (patch)
tree5d1988a6c26c4e04ec230ddf27275260a55a6e2a /drivers/gpu/drm/msm/dsi/phy/dsi_phy.h
parentdrm/msm/dsi: remove msm_dsi_pll_set_usecase (diff)
downloadkernel-5d13459650b3668edcd6d180787aac38d001c4ed.tar.gz
kernel-5d13459650b3668edcd6d180787aac38d001c4ed.zip
drm/msm/dsi: push provided clocks handling into a generic code
All MSM DSI PHYs provide two clocks: byte and pixel ones. Register/unregister provided clocks from the generic place, removing boilerplate code from all MSM DSI PHY drivers. Signed-off-by: Dmitry Baryshkov <[email protected]> Reviewed-by: Abhinav Kumar <[email protected]> Tested-by: Stephen Boyd <[email protected]> # on sc7180 lazor Link: https://lore.kernel.org/r/[email protected] Signed-off-by: Rob Clark <[email protected]>
Diffstat (limited to 'drivers/gpu/drm/msm/dsi/phy/dsi_phy.h')
-rw-r--r--drivers/gpu/drm/msm/dsi/phy/dsi_phy.h9
1 files changed, 6 insertions, 3 deletions
diff --git a/drivers/gpu/drm/msm/dsi/phy/dsi_phy.h b/drivers/gpu/drm/msm/dsi/phy/dsi_phy.h
index f737bef74b91..c3099629fa3b 100644
--- a/drivers/gpu/drm/msm/dsi/phy/dsi_phy.h
+++ b/drivers/gpu/drm/msm/dsi/phy/dsi_phy.h
@@ -23,9 +23,6 @@ struct msm_dsi_phy_ops {
struct msm_dsi_pll_ops {
int (*enable_seq)(struct msm_dsi_pll *pll);
void (*disable_seq)(struct msm_dsi_pll *pll);
- int (*get_provider)(struct msm_dsi_pll *pll,
- struct clk **byte_clk_provider,
- struct clk **pixel_clk_provider);
void (*destroy)(struct msm_dsi_pll *pll);
void (*save_state)(struct msm_dsi_pll *pll);
int (*restore_state)(struct msm_dsi_pll *pll);
@@ -87,6 +84,10 @@ struct msm_dsi_dphy_timing {
u8 hs_halfbyte_en_ckln;
};
+#define DSI_BYTE_PLL_CLK 0
+#define DSI_PIXEL_PLL_CLK 1
+#define NUM_PROVIDED_CLKS 2
+
struct msm_dsi_phy {
struct platform_device *pdev;
void __iomem *base;
@@ -104,6 +105,8 @@ struct msm_dsi_phy {
bool regulator_ldo_mode;
struct msm_dsi_pll *pll;
+
+ struct clk_hw_onecell_data *provided_clocks;
};
/*