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authorDmitry Baryshkov <[email protected]>2021-03-31 10:57:35 +0000
committerRob Clark <[email protected]>2021-04-07 18:05:47 +0000
commit36c5dde5fdf028daf005197a4dd08b196784bf9e (patch)
treeeeb0fa41956d40edb7db3780456e6426a96e7566 /drivers/gpu/drm/msm/dsi/phy/dsi_phy.h
parentdrm/msm/dsi: inline msm_dsi_phy_set_src_pll (diff)
downloadkernel-36c5dde5fdf028daf005197a4dd08b196784bf9e.tar.gz
kernel-36c5dde5fdf028daf005197a4dd08b196784bf9e.zip
drm/msm/dsi: stop passing src_pll_id to the phy_enable call
Phy driver already knows the source PLL id basing on the set usecase and the current PLL id. Stop passing it to the phy_enable call. As a reminder, dsi manager will always use DSI 0 as a clock master in a slave mode, so PLL 0 is always a clocksource for DSI 0 and it is always a clocksource for DSI 1 too unless DSI 1 is used in the standalone mode. Signed-off-by: Dmitry Baryshkov <[email protected]> Tested-by: Stephen Boyd <[email protected]> # on sc7180 lazor Reviewed-by: Abhinav Kumar <[email protected]> Link: https://lore.kernel.org/r/[email protected] Signed-off-by: Rob Clark <[email protected]>
Diffstat (limited to 'drivers/gpu/drm/msm/dsi/phy/dsi_phy.h')
-rw-r--r--drivers/gpu/drm/msm/dsi/phy/dsi_phy.h2
1 files changed, 1 insertions, 1 deletions
diff --git a/drivers/gpu/drm/msm/dsi/phy/dsi_phy.h b/drivers/gpu/drm/msm/dsi/phy/dsi_phy.h
index 00ef01baaebd..94a77ac364d3 100644
--- a/drivers/gpu/drm/msm/dsi/phy/dsi_phy.h
+++ b/drivers/gpu/drm/msm/dsi/phy/dsi_phy.h
@@ -19,7 +19,7 @@
struct msm_dsi_phy_ops {
int (*pll_init)(struct msm_dsi_phy *phy);
- int (*enable)(struct msm_dsi_phy *phy, int src_pll_id,
+ int (*enable)(struct msm_dsi_phy *phy,
struct msm_dsi_phy_clk_request *clk_req);
void (*disable)(struct msm_dsi_phy *phy);
void (*save_pll_state)(struct msm_dsi_phy *phy);