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| author | Luca Weiss <[email protected]> | 2023-06-01 17:00:13 +0000 |
|---|---|---|
| committer | Dmitry Baryshkov <[email protected]> | 2023-06-04 02:40:43 +0000 |
| commit | 1531d0b9235e5c8e959fbfe02c90ecd5b2b8de05 (patch) | |
| tree | 4260a0bc27327fe181212855e47485df4bbe563b /drivers/gpu/drm/msm/dsi/phy/dsi_phy.c | |
| parent | drm/msm/dsi: Add configuration for MSM8226 (diff) | |
| download | kernel-1531d0b9235e5c8e959fbfe02c90ecd5b2b8de05.tar.gz kernel-1531d0b9235e5c8e959fbfe02c90ecd5b2b8de05.zip | |
drm/msm/dsi: Add phy configuration for MSM8226
MSM8226 uses a modified PLL lock sequence compared to MSM8974, which is
based on the function dsi_pll_enable_seq_m in the msm-3.10 kernel.
Worth noting that the msm-3.10 downstream kernel also will try other
sequences in case this one doesn't work, but during testing it has shown
that the _m sequence succeeds first time also:
.pll_enable_seqs[0] = dsi_pll_enable_seq_m,
.pll_enable_seqs[1] = dsi_pll_enable_seq_m,
.pll_enable_seqs[2] = dsi_pll_enable_seq_d,
.pll_enable_seqs[3] = dsi_pll_enable_seq_d,
.pll_enable_seqs[4] = dsi_pll_enable_seq_f1,
.pll_enable_seqs[5] = dsi_pll_enable_seq_c,
.pll_enable_seqs[6] = dsi_pll_enable_seq_e,
We may need to expand this in the future.
Signed-off-by: Luca Weiss <[email protected]>
Reviewed-by: Dmitry Baryshkov <[email protected]>
Patchwork: https://patchwork.freedesktop.org/patch/540618/
Link: https://lore.kernel.org/r/[email protected]
Signed-off-by: Dmitry Baryshkov <[email protected]>
Diffstat (limited to 'drivers/gpu/drm/msm/dsi/phy/dsi_phy.c')
| -rw-r--r-- | drivers/gpu/drm/msm/dsi/phy/dsi_phy.c | 2 |
1 files changed, 2 insertions, 0 deletions
diff --git a/drivers/gpu/drm/msm/dsi/phy/dsi_phy.c b/drivers/gpu/drm/msm/dsi/phy/dsi_phy.c index bb09cbe8ff86..9d5795c58a98 100644 --- a/drivers/gpu/drm/msm/dsi/phy/dsi_phy.c +++ b/drivers/gpu/drm/msm/dsi/phy/dsi_phy.c @@ -541,6 +541,8 @@ static const struct of_device_id dsi_phy_dt_match[] = { .data = &dsi_phy_28nm_hpm_famb_cfgs }, { .compatible = "qcom,dsi-phy-28nm-lp", .data = &dsi_phy_28nm_lp_cfgs }, + { .compatible = "qcom,dsi-phy-28nm-8226", + .data = &dsi_phy_28nm_8226_cfgs }, #endif #ifdef CONFIG_DRM_MSM_DSI_20NM_PHY { .compatible = "qcom,dsi-phy-20nm", |