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| author | Chandrakala Chavva <[email protected]> | 2015-01-15 13:11:17 +0000 |
|---|---|---|
| committer | Ralf Baechle <[email protected]> | 2015-02-20 14:32:46 +0000 |
| commit | ac6d9b3a03930820bec0ebd3a28f9dae32d27342 (patch) | |
| tree | 69bd6e7b723955f113e977f4f392da9c7de0f469 /drivers/gpu/drm/imx/parallel-display.c | |
| parent | MIPS: OCTEON: Remove setting of processor specific CVMCTL icache bits. (diff) | |
| download | kernel-ac6d9b3a03930820bec0ebd3a28f9dae32d27342.tar.gz kernel-ac6d9b3a03930820bec0ebd3a28f9dae32d27342.zip | |
MIPS: OCTEON: More OCTEONIII support
Read clock rate from the correct CSR. Don't clear COP0_DCACHE for OCTEONIII.
Signed-off-by: Chandrakala Chavva <[email protected]>
Signed-off-by: Aleksey Makarov <[email protected]>
Signed-off-by: David Daney <[email protected]>
Cc: [email protected]
Cc: [email protected]
Patchwork: https://patchwork.linux-mips.org/patch/8945/
Signed-off-by: Ralf Baechle <[email protected]>
Diffstat (limited to 'drivers/gpu/drm/imx/parallel-display.c')
0 files changed, 0 insertions, 0 deletions