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authorImre Deak <[email protected]>2024-07-22 16:55:02 +0000
committerImre Deak <[email protected]>2024-07-31 15:45:59 +0000
commite44bc451aa4b08845c238028daafb4eaffb573a3 (patch)
treea981c85bc982f183280fef0c792a656662f78e5c /drivers/gpu/drm/i915/display/intel_dp_mst.h
parentdrm/i915/dp_mst: Reprobe the MST topology after a link parameter change (diff)
downloadkernel-e44bc451aa4b08845c238028daafb4eaffb573a3.tar.gz
kernel-e44bc451aa4b08845c238028daafb4eaffb573a3.zip
drm/i915/dp_mst: Ensure link parameters are up-to-date for a disabled link
As explained in the previous patch, the MST link BW reported by branch devices during topology probing/path resources enumeration depends on the link parameters programmed to DPCD to be up-to-date. After a sink is plugged this is not ensured, as those DPCD values start out zeroed. The target link parameters (for a subsequent modeset) are the maximum that is supported, so make sure these maximum values are programmed before the topology probing. Reviewed-by: Suraj Kandpal <[email protected]> Signed-off-by: Imre Deak <[email protected]> Link: https://patchwork.freedesktop.org/patch/msgid/[email protected]
Diffstat (limited to 'drivers/gpu/drm/i915/display/intel_dp_mst.h')
-rw-r--r--drivers/gpu/drm/i915/display/intel_dp_mst.h1
1 files changed, 1 insertions, 0 deletions
diff --git a/drivers/gpu/drm/i915/display/intel_dp_mst.h b/drivers/gpu/drm/i915/display/intel_dp_mst.h
index 8ca1d599091c..fba76454fa67 100644
--- a/drivers/gpu/drm/i915/display/intel_dp_mst.h
+++ b/drivers/gpu/drm/i915/display/intel_dp_mst.h
@@ -27,5 +27,6 @@ int intel_dp_mst_atomic_check_link(struct intel_atomic_state *state,
struct intel_link_bw_limits *limits);
bool intel_dp_mst_crtc_needs_modeset(struct intel_atomic_state *state,
struct intel_crtc *crtc);
+void intel_dp_mst_prepare_probe(struct intel_dp *intel_dp);
#endif /* __INTEL_DP_MST_H__ */