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| author | Cristian Ciocaltea <[email protected]> | 2025-02-04 12:40:06 +0000 |
|---|---|---|
| committer | Heiko Stuebner <[email protected]> | 2025-02-06 10:57:54 +0000 |
| commit | 2c1268e7aad0819f38e56134bbc2095fd95fde1b (patch) | |
| tree | b7dbd8a0ff30d252c9c16a6953d9c96ef932c7ef /drivers/gpu/drm/i915/display/intel_dp_mst.c | |
| parent | drm/rockchip: vop2: Drop unnecessary if_pixclk_rate computation (diff) | |
| download | kernel-2c1268e7aad0819f38e56134bbc2095fd95fde1b.tar.gz kernel-2c1268e7aad0819f38e56134bbc2095fd95fde1b.zip | |
drm/rockchip: vop2: Improve display modes handling on RK3588 HDMI0
The RK3588 specific implementation is currently quite limited in terms
of handling the full range of display modes supported by the connected
screens, e.g. 2560x1440@75Hz, 2048x1152@60Hz, 1024x768@60Hz are just a
few of them.
Additionally, it doesn't cope well with non-integer refresh rates like
59.94, 29.97, 23.98, etc.
Make use of HDMI0 PHY PLL as a more accurate DCLK source to handle
all display modes up to 4K@60Hz.
Tested-by: FUKAUMI Naoki <[email protected]>
Signed-off-by: Cristian Ciocaltea <[email protected]>
Signed-off-by: Heiko Stuebner <[email protected]>
Link: https://patchwork.freedesktop.org/patch/msgid/[email protected]
Diffstat (limited to 'drivers/gpu/drm/i915/display/intel_dp_mst.c')
0 files changed, 0 insertions, 0 deletions