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| author | Imre Deak <[email protected]> | 2025-05-09 18:03:33 +0000 |
|---|---|---|
| committer | Imre Deak <[email protected]> | 2025-05-12 12:22:48 +0000 |
| commit | 1f581f38bc0d23c6ac6714c84a72e098f1f645fe (patch) | |
| tree | ea1d4aaac0d7e2f3cb94dcc298303678d5dc352e /drivers/gpu/drm/i915/display/intel_dp_mst.c | |
| parent | drm/i915/dp_mst: Check BW limit on the local MST link early (diff) | |
| download | kernel-1f581f38bc0d23c6ac6714c84a72e098f1f645fe.tar.gz kernel-1f581f38bc0d23c6ac6714c84a72e098f1f645fe.zip | |
drm/i915/dp_mst: Simplify computing the min/max compressed bpp limits
Adjusting the compressed bpp range min/max limits in
intel_dp_dsc_nearest_valid_bpp() is unnecessary:
- The source/sink min/max values are enforced already by the
link_config_limits::min_bpp_x16/max_bpp_x16 values computed early in
intel_dp_compute_config_link_bpp_limits().
- The fixed set of valid bpps are enforced already - for all bpps in the
min .. max range by intel_dp_dsc_valid_compressed_bpp() called from
intel_dp_mtp_tu_compute_config().
The only thing needed is limiting max compressed bpp below the
uncompressed pipe bpp, do that one thing only instead of calling
intel_dp_dsc_nearest_valid_bpp().
Reviewed-by: Luca Coelho <[email protected]>
Reviewed-by: Ankit Nautiyal <[email protected]>
Signed-off-by: Imre Deak <[email protected]>
Link: https://lore.kernel.org/r/[email protected]
Diffstat (limited to 'drivers/gpu/drm/i915/display/intel_dp_mst.c')
| -rw-r--r-- | drivers/gpu/drm/i915/display/intel_dp_mst.c | 6 |
1 files changed, 1 insertions, 5 deletions
diff --git a/drivers/gpu/drm/i915/display/intel_dp_mst.c b/drivers/gpu/drm/i915/display/intel_dp_mst.c index ff88888e4b29..42351229177d 100644 --- a/drivers/gpu/drm/i915/display/intel_dp_mst.c +++ b/drivers/gpu/drm/i915/display/intel_dp_mst.c @@ -491,11 +491,7 @@ static int mst_stream_dsc_compute_link_config(struct intel_dp *intel_dp, drm_dbg_kms(display->drm, "DSC Sink supported compressed min bpp %d compressed max bpp %d\n", min_compressed_bpp, max_compressed_bpp); - /* Align compressed bpps according to our own constraints */ - max_compressed_bpp = intel_dp_dsc_nearest_valid_bpp(display, max_compressed_bpp, - crtc_state->pipe_bpp); - min_compressed_bpp = intel_dp_dsc_nearest_valid_bpp(display, min_compressed_bpp, - crtc_state->pipe_bpp); + max_compressed_bpp = min(max_compressed_bpp, crtc_state->pipe_bpp - 1); crtc_state->lane_count = limits->max_lane_count; crtc_state->port_clock = limits->max_rate; |
