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| author | Dave Airlie <[email protected]> | 2022-03-21 03:48:19 +0000 |
|---|---|---|
| committer | Dave Airlie <[email protected]> | 2022-03-21 03:48:20 +0000 |
| commit | c6e90a1c660874736bd09c1fec6312b4b4c2ff7b (patch) | |
| tree | dbc6a8981b5955bac31381a00d113621890344c9 /drivers/gpu/drm/amd/pm/amdgpu_dpm.c | |
| parent | Merge tag 'drm-intel-next-fixes-2022-03-17' of git://anongit.freedesktop.org/... (diff) | |
| parent | drm/amdgpu: Use drm_mode_copy() (diff) | |
| download | kernel-c6e90a1c660874736bd09c1fec6312b4b4c2ff7b.tar.gz kernel-c6e90a1c660874736bd09c1fec6312b4b4c2ff7b.zip | |
Merge tag 'amd-drm-next-5.18-2022-03-18' of https://gitlab.freedesktop.org/agd5f/linux into drm-next
amd-drm-next-5.18-2022-03-18:
amdgpu:
- Aldebaran fixes
- SMU 13.0.5 fixes
- DCN 3.1.5 fixes
- DCN 3.1.6 fixes
- Pipe split fixes
- More display FP cleanup
- DP 2.0 UHBR fix
- DC GPU reset fix
- DC deep color ratio fix
- SMU robustness fixes
- Runtime PM fix for APUs
- IGT reload fixes
- SR-IOV fix
- Misc fixes and cleanups
amdkfd:
- CRIU fixes
- SVM fixes
UAPI:
- Properly handle SDMA transfers with CRIU
Proposed user mode change: https://github.com/checkpoint-restore/criu/pull/1709
Signed-off-by: Dave Airlie <[email protected]>
From: Alex Deucher <[email protected]>
Link: https://patchwork.freedesktop.org/patch/msgid/[email protected]
Diffstat (limited to 'drivers/gpu/drm/amd/pm/amdgpu_dpm.c')
| -rw-r--r-- | drivers/gpu/drm/amd/pm/amdgpu_dpm.c | 19 |
1 files changed, 18 insertions, 1 deletions
diff --git a/drivers/gpu/drm/amd/pm/amdgpu_dpm.c b/drivers/gpu/drm/amd/pm/amdgpu_dpm.c index 1d63f1e8884c..89fbee568be4 100644 --- a/drivers/gpu/drm/amd/pm/amdgpu_dpm.c +++ b/drivers/gpu/drm/amd/pm/amdgpu_dpm.c @@ -507,6 +507,18 @@ int amdgpu_dpm_send_hbm_bad_pages_num(struct amdgpu_device *adev, uint32_t size) return ret; } +int amdgpu_dpm_send_hbm_bad_channel_flag(struct amdgpu_device *adev, uint32_t size) +{ + struct smu_context *smu = adev->powerplay.pp_handle; + int ret = 0; + + mutex_lock(&adev->pm.mutex); + ret = smu_send_hbm_bad_channel_flag(smu, size); + mutex_unlock(&adev->pm.mutex); + + return ret; +} + int amdgpu_dpm_get_dpm_freq_range(struct amdgpu_device *adev, enum pp_clock_type type, uint32_t *min, @@ -631,11 +643,16 @@ int amdgpu_dpm_get_ecc_info(struct amdgpu_device *adev, void *umc_ecc) { struct smu_context *smu = adev->powerplay.pp_handle; + int ret = 0; if (!is_support_sw_smu(adev)) return -EOPNOTSUPP; - return smu_get_ecc_info(smu, umc_ecc); + mutex_lock(&adev->pm.mutex); + ret = smu_get_ecc_info(smu, umc_ecc); + mutex_unlock(&adev->pm.mutex); + + return ret; } struct amd_vce_state *amdgpu_dpm_get_vce_clock_state(struct amdgpu_device *adev, |