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| author | Shah Dharati <[email protected]> | 2022-05-31 13:58:12 +0000 |
|---|---|---|
| committer | Alex Deucher <[email protected]> | 2022-06-15 01:38:40 +0000 |
| commit | b840b64bc8ed3fc46f6d6aa7f97c43862a33bea5 (patch) | |
| tree | 7fecfb58dd593472757c0710751885bb3037df7f /drivers/gpu/drm/amd/display/modules/inc/mod_freesync.h | |
| parent | drm/amd/display: lower lane count first when CR done partially fails in EQ (diff) | |
| download | kernel-b840b64bc8ed3fc46f6d6aa7f97c43862a33bea5.tar.gz kernel-b840b64bc8ed3fc46f6d6aa7f97c43862a33bea5.zip | |
drm/amd/display: Fix monitor flash issue
[Why & How]
For a some specific monitors, when connected on boot or hot plug,
monitor flash for 1/2 seconds can happen during first HDCP query
operation. Ading some delay in the init sequence for these monitors
fixes the issue, so it is implemented as monitor specific patch.
Co-authored-by: Shah Dharati <[email protected]>
Reviewed-by: Hansen Dsouza <[email protected]>
Reviewed-by: Nicholas Kazlauskas <[email protected]>
Acked-by: Hamza Mahfooz <[email protected]>
Signed-off-by: Shah Dharati <[email protected]>
Tested-by: Daniel Wheeler <[email protected]>
Signed-off-by: Alex Deucher <[email protected]>
Diffstat (limited to 'drivers/gpu/drm/amd/display/modules/inc/mod_freesync.h')
0 files changed, 0 insertions, 0 deletions